December 13, 2023 (DAY 0) (All Time in Beijing Standard Time)
5:30 PM - 9:00 PM Registration & Reception
December 14, 2023 (DAY 1) (All Time in Beijing Standard Time)
9:00 AM - 9:15 AM
Opening Remarks
9:15 AM - 10:05 AM
Keynote 1 Session Chair: Yuan Cao Speaker: Leibo Liu (Tsinghua University) Title: Silicon enabled Cryptographic World
10:05 AM - 10:20 AM BREAK
10:20 AM - 11:40 AM
Regular Paper Session 1: Advanced Hardware Security Attacks Session Chair: Yongqiang Lv
Overtake: Achieving Meltdown-type Attacks with One Instruction Yu Jin, Pengfei Qiu, Chunlu Wang, Yihao Yang, Dongsheng Wang, Xiaoyong Li, Qian Wang and Gang Qu - Beijing University of Posts and Telecommunications, Tsinghua University, China; Lehigh University, University of Maryland, USA
Emulating Covert Data Transmission on Heterogeneous SoCs Lilian Bossuet and Carlos Andres Lara Nino - UniversitéJean Monnet Saint-Etienne, France
HeisenTrojans: They Are Not There Until They Are Triggered Dean Sullivan, Orlando Arias, Xiaolong Guo, Haoqi Shan and Akshita Reddy Mavurapu - University of New Hampshire, University of Massachusetts, CertiK, USA
When Memory Mappings Attack: On the (Mis)use of the ARM Cortex-M FPB Unit Haoqi Shan, Dean Sullivan and Orlando Arias - CertiK, University of New Hampshire, University of Massachusetts, USA
LUNCH BREAK
1:00 PM - 1:50 PM
Keynote 2 Session Chair: Weiqiang Liu Speaker: Chip Hong Chang, Nanyang Technological University, Singapore Title: Security of Edged Deep Neural Networks
1:50 PM - 2:50 PM
Regular Paper Session 2: Advanced Hardware Security and Applications Session Chair: Chongyan Gu
Hardware Security of Digital Image Filter IP Cores against Piracy using IP Seller's Fingerprint Encrypted Amino Acid Biometric Sample Anirban Sengupta, Rahul Chaurasia and Aditya Anshul - Indian Institute of Technology Indore, India
TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design Raphaele Milan, Lilian Bossuet, Loic Lagadec, Carlos Andres Lara Nino and Brice Colombier - UniversitéJean Monnet Saint-Etienne
DF-TEE: Trusted Execution Environment for Disaggregated Multi-FPGA Cloud Systems Ke Xia and Sheng Wei - Rutgers University
2:50 PM - 3:05 PM BREAK
3:05 PM - 4:25 PM
Regular Paper Session 3: Advanced Hardware Security Primitives and Cryptography Session Chair: Aijiao Cui
Intrinsic Processor-based PUF Design for Approximate Computing: Faith or Reality? Aditya Japa, Jiliang Zhang, Weqiang Liu and Chongyan Gu - Queen's University Belfast, UK; Hunan University, Nanjing University of Aeronautics and Astronautics, China
A Lightweight and Machine-Learning-Resistant PUF framework based on Nonlinear Structure and Obfuscating Challenges Tianming Ni, Fei Li, Qingsong Peng, Senling Wang and Xiaoqing Wen - Anhui Polytechnic University, Hefei University of Technology, China; Ehime University, Kyushu Institute of Technology, Japan
A Lightweight Authentication Scheme with PE-Based Unclonable Label Renchao Li, Zhen Weng, Aijiao Cui and Gang Qu - Harbin Institute of Technology (Shenzhen), China; University of Marylan, USA
A Comparative Analysis between Karatsuba, Toom-Cook and NTT Multiplier for Polynomial Multiplication in NTRU on FPGA Harish Prasad Allam, Suraj Mandal and DEBAPRIYA Basu Roy- IIT Kanpur, India
4:25 PM - 5:25 PM
Panel Topic: Hardware Security in the Age of AI Panel Moderator: Song Bian/Yongqiang Lv Panelists:
Chip Hong Chang, Nanyang Technological University, Singapore
Michael Schwarz, CISPA Helmholtz Center for Information Security, Germany
Marten van Dijk, Vrjie Universiteit van Amsterdam, Netherlands
Xianzhao Xia, China Automotive Technology and Research Center Co, Ltd.
6:00 PM - 9:30 PM Gala Dinner Session Chair: Qiang Liu Invited Speaker: Open Security Research (OSR) Title: TBC
December 15, 2023 (DAY 2) (All Time in Beijing Standard Time)
9:00 AM - 9:50 AM
Keynote 3 Session Chair: Jiliang Zhang Speaker: Michael Schwarz, CISPA Helmholtz Center for Information Security, Germany Title: (In)visible Bugs - From Transient Execution to Architectural CPU Vulnerabilities
9:50 AM - 10:05 AM BREAK
10:05 AM - 10:55 PM
SHORT PAPER SESSION Session Chair: Qiaoyan Yu
Fault Analysis on AES and SM4 Through Automatic Property Extraction and Checking Xingxin Wang, Chaoxuan Yuan and Wei Hu - Northwestern Polytechnical University, China
Tamper Resistant Design of Convolutional Neural Network Hardware Accelerator Haosen Yu, Peiyao Sun, Basel Halak, Karthik Shanthakumar and Tomasz Kazmierski - University of Southampton, UK
DDQ-APUF: A Highly Reliable Arbiter PUF Using Delay Difference Quantization Xue Mei, Guangyang Zhang, Chongyan Gu and Yao Wang - Zhengzhou University, China; Queen's University Belfast, UK
A Comparison of One-class and Two-class Models for Ransomware Detection via Low-level Hardware Information Chutitep Woralert, Chen Liu and Zander Blasingame - Clarkson University
A Compact Weak PUF Circuit Based on Random Process Deviations of Amplifier Chain Pengjun Wang, Yuanfeng Xie and Gang Li - Wenzhou University, China
10:55 AM - 11:40 AM
Keynote 4 Session Chair:Wei Hu Speaker: Marten van Dijk, Vrjie Universiteit van Amsterdam, Netherlands Title: A Theoretical Framework for the Analysis of PUF Interfaces
LUNCH BREAK
1:00 PM - 2:00 PM
Regular Paper Session 4: Hardware Security Attacks and Countermeasures Session Chair:Yier Jin
A Hybrid Neural Network for Simultaneous Multi-Attack Detection in Sensor Networks Nishanth Chennagouni, Mohammad Monjur, Wei Lu and Qiaoyan Yu - University of New Hampshire, USA; Keene State College, USA
NNLeak: An AI-Oriented DNN Model Extraction Attack through Multi-Stage Side Channel Analysis Ya Gao, Haocheng Ma, Mingkai Yan, Jiaji He, Yiqiang Zhao and Yier Jin - Tianjin University, China; University of Science and Technology of China, China
AHD-LAM: A New Mitigation Method against Voltage Drop Attacks in Multi-tenant FPGAs Mashrafi Kajol, Sandeep Sunkavilli and Qiaoyan Yu - University of New Hampshire, USA
LLM4SecHW: Leavering Domain-Specific Large Language Model for Hardware Debugging Weimin Fu, Kaichen Yang, Raj Gautam Dutta, Xiaolong Guo and Gang Qu - Kansas State University, USA; Michigan Technological University, USA; Silicon Assurance, USA; University of Maryland, USA
2:00 PM - 3:00 PM
PhD Forum Presentation Session Chair:Yue Zheng/He Li
A Fully Pipelined High-Performance Elliptic Curve Cryptography Processor for 256-bit Primes Han Yan, Shuai Chen, Junying Huang, Jing Ye, Huawei Li and Xiaowei Li - State Key Lab of Processors, Institute of Computing Technology, CAS and Rock-solid security Lab., Binary Semiconductor Co., Ltd.
A Lightweight and Efficient Voltage Glitch Detection Scheme Xingzhe Zhu and Qiang Liu - Tianjin University
High-Performance FPGA-based Post Quantum Cryptography Implementations High-Performance FPGA-based Post Quantum Cryptography Implementations - Nanjing University of Aeronautics and Astronautics
A low-cost shuffling countermeasure against power analysis attacks for MDC-NTT Jiatong Tian, Yijun Cui, Weiqiang Liu and Chenghua Wang - Nanjing University of Aeronautics and Astronautics
A Dual-Mode Monostable Schmitt Trigger PUF Featuring <0.1% Native BER with a Supply Voltage Down to 25%VDD Jianlin Zhong, Haochen Zhong, Yan You and Xiaojin Zhao - Shenzhen University
A 98fJ/Bit Current-Starved-Ring-Oscillator-Based TRNG with High PVT Tolerance and Resilience to Frequency Injection Attack up to 1Vpp Jiacheng Hao, Qingsen Zhuang, Junhang Zhang and Xiaojin Zhao - Shenzhen University
Load Slipping: A New Side Channel to Leak Instruction-Level Control Flow on AMD SEV-SNP Chang Liu, Pengfei Qiu, Yongqiang Lyu, Wenjian He and Dongsheng Wang - Tsinghua University, Key Laboratory of Trustworthy Distributed Computing and Service (BUPT), Ministry of Education and Huawei Technologies Co., Ltd.
Zen2 Memory Disambiguation Mechanism Reverse Engineering and Vulnerability Exploiting Zhuoyuan Lu - Beijing University of Posts and Telecommunications
Research on FSM structure Reverse Engineering based on Scan-Dump Data Zhaoxuan Dong and Aijiao Cui - Harbin Institute of Technology (Shenzhen)
Research on Counter Hardware Trojan Detection Based on Scan Data Hao Lu and Aijiao Cui - Harbin Institute of Technology (Shenzhen)
Trusted SoC by Design with Cryptographically Isolation per process Muhammad Yousaf, Dr. Muhammad Yasir Qadri and Sidra Naseer - Centers of Excellence in Advanced Science and Technology (CESAT), Pakistan
Real-time Adaptive Error Correction for Quantum Key Distribution on FPGAs Bingze Ye, Jun Teng and He Li - Southeast University
3:00 PM - 3:45 PM
PhD Forum Poster with Snacks and Drink
3:45 PM - 4:15 PM
Closing Remarks and Awards Announcement
